VHDL modeling of the IEEE802.11b DCF MAC

The wireless communication is highly deployed due to it convenience of mobility. The wireless local area network, WLAN is dominated by IEEE802. 11 standard. All the new notebooks are equipped with the IEEE802. 11 b WLAN. It becomes one of the main focuses of the WLAN research. Most of the researches are simulation based due to high cost required for the hardware implementation. The IEEE802. 11b standard contains two major operations, the Distribution Coordination Function (DCF) and Point Coordination Function (PCF). The main core of the IEEE802. 11b, the CSMA/CA and the IEEE802. 11b Physical and MAC are modeled in this paper using VHDL. The VHDL is defined in IEEE as a tool of creation of electronics system because it supports the development, verification, synthesis and testing of hardware design, the communication of hardware design data and the maintenance, modification and procurement of hardware [2]. The CSMA/CA is modeled to 3 major blocks in VHDL, the CSMACA, Random Generator and counter. The CSMA/CA is successfully modeled with a total of 58 pins and it used 15% of the total logic elements of the APEXTM 20KE FPGA. The CSMA/CA can support the operation frequency up to 50MHz.