Abstract
Simulation and physical experiments have shown that vacancy engineering implants have the potential to provide outstanding pMOS source/drain performance for several future CMOS device generations. Using vacancy-generating implants prior to boron implantation, hole concentrations approaching 10(21) cm(-3) can be achieved using low thermal budget annealing. In this new study we propose that the vacancy engineering technique is not reliant on the implementation of SOI-based CMOS but is also directly applicable to bulk silicon technologies.
Original language | English |
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Title of host publication | 38th European Solid-State Device Research Conference, 2008 |
Editors | Stephen Hall, Anthony Walton |
Publisher | IEEE |
Pages | 290-293 |
Number of pages | 4 |
ISBN (Electronic) | 978-1-4244-2364-4 |
ISBN (Print) | 978-1-4244-2363-7 |
DOIs | |
Publication status | Published - 2008 |
Event | 38th European Solid-State Device Research Conference - Edinburgh, United Kingdom Duration: 15 Sept 2008 → 19 Sept 2008 |
Conference
Conference | 38th European Solid-State Device Research Conference |
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Abbreviated title | ESSDERC 2008 |
Country/Territory | United Kingdom |
City | Edinburgh |
Period | 15/09/08 → 19/09/08 |
Keywords
- SI