Abstract
The list of applications requiring high-performance computing resources is constantly growing. The cost of inter-processor communication is critical in determining the performance of massively parallel computing systems for many of these applications. This paper considers the feasibility of a commodity processor-based system which uses a free-space optical interconnect. A novel architecture, based on this technology, is presented. Analytical and simulation results based on an implementation of BSP (Bulk Synchronous Parallelism) are presented, indicating that a significant performance enhancement, over architectures using conventional interconnect technology, is possible. Copyright © 2004 John Wiley & Sons, Ltd.
Original language | English |
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Pages (from-to) | 1247-1270 |
Number of pages | 24 |
Journal | Concurrency and Computation: Practice and Experience |
Volume | 16 |
Issue number | 13 |
DOIs | |
Publication status | Published - Nov 2004 |
Keywords
- BSP
- Optical interconnect
- Parallel
- Sorting