Stencil printing technology for wafer level bumping at sub-100 micron pitch using Pb-free alloys

R. W. Kay, E. De Gourcuff, M. P Y Desmulliez, G. J. Jackson, H. A H Steen, C. Liu, P. P. Conway

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

Abstract

In this paper solder paste printing is reported at sub 100µm pitch using Pb-free solder paste with IPC type-6 (15-5µm) particle size distributions. The results confirm that consistent sized paste deposits can be produced onto wafers at ultra fine pitch geometries using a stencil printing process. Furthermore, a stencil printing evaluation has determined the impact that the print parameters have on the reproducibility of the deposits. The investigation also reveals that the volume of solder paste deposit can be controlled by selecting different shapes of stencil apertures. Large volumes of paste are required during reflowing of the fine particle solder paste to produce sufficient stand-off between the flip chip device and substrate. Print consistency and uniformity of the bumps generated are also governed by the volume of solder paste for each deposit. Statistical examinations of printing defects from a large number of printing trials have been conducted for several bump geometries. Subsequently the best print parameters were then used to print onto wafers containing bond pads so the paste deposits could be reflowed to form solder spheres for analysis. This advancement in the stencil printing process at ultra fine pitch has been made possible by refinements to both solder paste design and stencil manufacturing technology. Adjustments in the solder paste rheology (shear thinning, tackiness and visco-elastic properties), mainly by varying the metal content and flux type, have enabled successful printing at ultra fine pitch geometries. The design of new paste material has also be conducted alongside a Design of Experiments to adjust printing parameters such as printing speed, pressure, print gap and separation speed to allow for a practical process window. Moreover, advancements in stencil fabrication methods have produced 'state-of-the-art' stencils exhibiting highly defined shaped apertures with smooth walls at ultra fine pitch, thus allowing for improved solder paste release at very small dimensions. © 2005 IEEE.

Original languageEnglish
Title of host publicationProceedings - Electronic Components and Technology Conference
Pages848-854
Number of pages7
Volume1
Publication statusPublished - 2005
Event55th Electronic Components and Technology Conference - Lake Buena Vista, FL, United States
Duration: 31 May 20054 Jun 2005

Conference

Conference55th Electronic Components and Technology Conference
Abbreviated titleECTC
CountryUnited States
CityLake Buena Vista, FL
Period31/05/054/06/05

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  • Cite this

    Kay, R. W., De Gourcuff, E., Desmulliez, M. P. Y., Jackson, G. J., Steen, H. A. H., Liu, C., & Conway, P. P. (2005). Stencil printing technology for wafer level bumping at sub-100 micron pitch using Pb-free alloys. In Proceedings - Electronic Components and Technology Conference (Vol. 1, pp. 848-854)