Smart optoelectronic networks for multiprocessors

An intelligent interconnection network with fine-grain parallelism is described that has the potential to support efficient, scalable algorithms running on associated coarse-grain processors. The approach is relevant to the emerging computational cluster systems. The support of concurrent operations within the network is discussed and their mapping onto smart-pixel array network interfaces is shown. Choices are considered in the design of the flee-space optical interconnect that enables the inter-smart-pixel-array communication. In particular, a system that uses multi-element macro-lenses is studied and results of detailed modeling are given that quantify the smart-pixel density. These results are used, in an illustrative case study of the sorting problem, to compare potential system architectures. This is work in progress and throughout the paper, important issues in the design and use of the intelligent interconnect are raised that require more study.