Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture

Deepayan Bhowmik; Paulo Garcia; Andrew Wallace; Robert Stewart; Greg Michaelson

doi:10.1109/DASIP.2017.8122128

Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture

Deepayan Bhowmik, Paulo Garcia, Andrew Wallace, Robert Stewart, Greg Michaelson

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

25 Downloads (Pure)

Abstract

The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.

Original language	English
Title of host publication	2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
Publisher	IEEE
ISBN (Electronic)	9781538635346
DOIs	https://doi.org/10.1109/DASIP.2017.8122128
Publication status	Published - 1 Dec 2017

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@inproceedings{3794c18e355c43f4aa522b8b46da07e8,

title = "Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture",

abstract = "The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.",

author = "Deepayan Bhowmik and Paulo Garcia and Andrew Wallace and Robert Stewart and Greg Michaelson",

year = "2017",

month = dec,

day = "1",

doi = "10.1109/DASIP.2017.8122128",

language = "English",

booktitle = "2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)",

publisher = "IEEE",

address = "United States",

}

TY - GEN

T1 - Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture

AU - Bhowmik, Deepayan

AU - Garcia, Paulo

AU - Wallace, Andrew

AU - Stewart, Robert

AU - Michaelson, Greg

PY - 2017/12/1

Y1 - 2017/12/1

N2 - The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.

AB - The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.

U2 - 10.1109/DASIP.2017.8122128

DO - 10.1109/DASIP.2017.8122128

M3 - Conference contribution

BT - 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)

PB - IEEE

ER -

Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture

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