Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture

Deepayan Bhowmik, Paulo Garcia, Andrew Wallace, Robert Stewart, Greg Michaelson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

The following topics are dealt with: field programmable gate arrays; cameras; system-on-chip; multiprocessing systems; computer vision; embedded systems; microprocessor chips; object detection; image sensors; mobile robots.
Original languageEnglish
Title of host publication2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
PublisherIEEE
ISBN (Electronic)9781538635346
DOIs
Publication statusPublished - 1 Dec 2017

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  • Cite this

    Bhowmik, D., Garcia, P., Wallace, A., Stewart, R., & Michaelson, G. (2017). Power Efficient Dataflow Design for a Heterogeneous Smart Camera Architecture. In 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP) [8122128] IEEE. https://doi.org/10.1109/DASIP.2017.8122128