Abstract
This brief presents two-optimized partial look-up table (LUT) designs for low-complexity realization of distributed arithmetic (DA) based block least-mean-square (BLMS) adaptive filter (ADF). These are based on the partial add-store (PAS) and partial store-add (PSA) methods. A novel optimization scheme is presented which exploits the redundancies between the partial inner-products with sliding-window of input-block. It is found that the PAS method provides shorter critical-path-delay than the PSA method. A case study on echo-cancellation is demonstrated for architectural trade-off between the proposed designs. Synthesis results show that the proposed PSA based BLMS ADF for 64th order offers 41.04% lesser area and 39.38% lesser power, while the PAS based BLMS ADF provides 52.08% lesser area and 50.05% lesser power as compared to the best existing work.
| Original language | English |
|---|---|
| Pages (from-to) | 1188-1192 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 68 |
| Issue number | 4 |
| Early online date | 3 Nov 2020 |
| DOIs | |
| Publication status | Published - Apr 2021 |
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