Free-space optical interconnects have been identified as a potentially important technology for future massively parallel-computing systems. The development of optoelectronic smart pixels based on InGaAs/AlGaAs multiple-quantum-well modulators and detectors flip-chip solder-bump bonded onto complementary-metal-oxide-semiconductor (CMOS) circuits and the design and construction of an experimental processor in which the devices are linked by free-space optical interconnects are described. For demonstrating the capabilities of the technology, a parallel data-sorting system has been identified as an effective demonstrator. By use of Batcher's bitonic sorting algorithm and exploitation of a perfect-shuffle optical interconnection, the system has the potential to perform a full sort on 1024, 16-bit words in less than 16 µs. We describe the design, testing, and characterization of the smart-pixel devices and free-space optical components. InGaAs-CMOS smart-pixel, chip-to-chip communication has been demonstrated at 50 Mbits/s. It is shown that the initial system specifications can be met by the component technologies. © 1998 Optical Society of America.
|Number of pages||9|
|Publication status||Published - 1998|