The integration of 2-D optoelectronic interfaces with silicon chips can overcome many of the foreseen limitations of conventional interconnects. The solution is to provide free-space optical interconnects operating at the silicon on-chip clock-rate and with the numbers required to yield the necessary aggregate bandwidth. The application of this approach is studied by building an optoelectronic data sorting machine as a system demonstrator. The demonstrator system is based around two CMOS/InGaAs smart-pixel arrays, each with 1024 optical inputs and 1024 outputs, linked by a free-space parallel optical interconnect. It takes advantage of the ability of optics to provide large aggregate bandwidth and non-local interconnects.
|Title of host publication||Proceedings of the 1998 International Symposium on Information Theory|
|Publication status||Published - 1998|
|Event||1998 International Symposium on Information Theory - Glasgow, Scotland, United Kingdom|
Duration: 14 Sep 1998 → 18 Sep 1998
|Conference||1998 International Symposium on Information Theory|
|Period||14/09/98 → 18/09/98|