Optoelectronic sorter system

James Gourlay, Tsung Yi Yang, Julian A B Dines, Mark G. Forbes, Andrew J. Waddie, Andrew C. Walker, David G. Vass, Ian Underwood, Colin R. Stanley, Wilson Sibbett

Research output: Chapter in Book/Report/Conference proceedingConference contribution


The integration of 2-D optoelectronic interfaces with silicon chips can overcome many of the foreseen limitations of conventional interconnects. The solution is to provide free-space optical interconnects operating at the silicon on-chip clock-rate and with the numbers required to yield the necessary aggregate bandwidth. The application of this approach is studied by building an optoelectronic data sorting machine as a system demonstrator. The demonstrator system is based around two CMOS/InGaAs smart-pixel arrays, each with 1024 optical inputs and 1024 outputs, linked by a free-space parallel optical interconnect. It takes advantage of the ability of optics to provide large aggregate bandwidth and non-local interconnects.

Original languageEnglish
Title of host publicationProceedings of the 1998 International Symposium on Information Theory
Publication statusPublished - 1998
Event1998 International Symposium on Information Theory - Glasgow, Scotland, United Kingdom
Duration: 14 Sep 199818 Sep 1998


Conference1998 International Symposium on Information Theory
Abbreviated titleCLEO/EUROPE'98
CountryUnited Kingdom
CityGlasgow, Scotland

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    Gourlay, J., Yang, T. Y., Dines, J. A. B., Forbes, M. G., Waddie, A. J., Walker, A. C., Vass, D. G., Underwood, I., Stanley, C. R., & Sibbett, W. (1998). Optoelectronic sorter system. In Proceedings of the 1998 International Symposium on Information Theory (pp. 51)