Abstract
Details of the logic design and layout of exchange/bypass self-routing nodes will be presented. Silicon and gallium arsenide based technologies are used to layout the nodes. Performance metrics of the pixels are quantified.
Original language | English |
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Title of host publication | Proceedings of the LEOS 1994 Summer Topical Meeting |
Pages | 32-33 |
Number of pages | 2 |
Publication status | Published - 1994 |
Event | LEOS 1994 Summer Topical Meeting - Lake Tahoe, NV, United States Duration: 11 Jul 1994 → 13 Jul 1994 |
Conference
Conference | LEOS 1994 Summer Topical Meeting |
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Country/Territory | United States |
City | Lake Tahoe, NV |
Period | 11/07/94 → 13/07/94 |