On the impact of through-silicon-via-induced stress on 65-nm CMOS devices
- Roshan Weerasekera*
- , Hong Yu Li
- , Lim Wei Yi
- , Hu Sanming
- , Jinglin Shi
- , Je Minkyu
- , Keng Hwa Teo
- , Sanming Hu
*Corresponding author for this work
Research output: Contribution to journal › Article › peer-review
23
Link opens in a new tab
Citations
(Scopus)