New operators of GA for improving the performance of high-level synthesis

Evolutionary algorithms (EAs) have been largely applied to optimization and synthesis of VLSI design. In spite of several successful applications and competitive solutions, the stochastic nature of EAs and the uncertainty of the results have considerably hindered their use in industrial applications. This paper describes an investigation and its results on an evolutionary approach to solving a particular class of highly constrained VLSI problem, the high-level synthesis (HLS). HLS, also called architectural synthesis, is the process of automatically generating a Register Transfer Level (RTL) design from a behavioral specification. Two significant features were added to the standard genetic algorithm (SGA): guided genetic operators based on directional mutation and selection tournaments based on genome vicinity. The approach generates offspring by preserving the building blocks of the parents. The experiment results show that the proposed GA is able to guarantee high performance and low variance in the results.