Modified phase locked loop for grid connected single phase inverter

Eyad Radwan, Khalil Salih, Emad Awada, Mutasim Ibrahim Nour

Research output: Contribution to journalArticlepeer-review

15 Citations (Scopus)
146 Downloads (Pure)


Connecting a single-phase or three-phase inverter to the grid in distributed generation applications requires synchronization with the grid. Synchronization of an inverter-connected distributed generation units in its basic form necessitates accurate information about the frequency and phase angle of the utility grid. Phase Locked Loop (PLL) circuit is usually used for the purpose of synchronization. However, deviation in the grid frequency from nominal value will cause errors in the PLL estimated outputs, and that’s a major drawback. Moreover, if the grid is heavily distorted with low order harmonics the estimation of the grid phase angle deteriorates resulting in higher oscillations (errors) appearing in the synchronization voltage signals. This paper proposes a modified time delay PLL (MTDPLL) technique that continuously updates a variable time delay unit to keep track of the variation in the grid frequency. The MTDPLL is implemented along a Multi-Harmonic Decoupling Cell (MHDC) to overcome the effects of distortion caused by gird lower order harmonics. The performance of the proposed MTDPLL is verified by simulation and compared in terms of performance and accuracy with recent PLL techniques.
Original languageEnglish
Pages (from-to)3934-3943
Number of pages10
JournalInternational Journal of Electrical and Computer Engineering
Issue number5
Publication statusPublished - 1 Oct 2019


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