Low cost implementation of concurrent decision feedback equalizer using distributed arithmetic

This paper presents an architecture of decision feedback equalizer (DFE) based on concurrent lookahead technique using distributed arithmetic (DA) for low cost implementation. For multi-gigabit design, concurrent lookahead technique opens up the loop and provides throughput which is proportional to parallelization factor using multi-input finite impulse response (MI-FIR) filter. We employed DA approach in our scheme for both in pre-lookahead filter and post-lookahead filter by deriving its weight vectors, which could be pre-computed and stored in look-up table (LUT). This results in saving significant chip area with filters of high order and can be used in high speed applications with more parallelization since it maintains the concurrent nature. We have carried out synthesis in cadence RTL compiler using UMC 180 nm CMOS technology for feedback filter of order N = 3, 6 and 9 and found that our scheme provides low area compared to existing schemes.