Improved convergent distributed arithmetic based low complexity pipelined least-meansquare filter

Mohd Tasleem Khan, Rafi Ahamed Shaik*, Surya Prakash Matcha

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

This study presents an improved convergent distributed arithmetic (DA)-based low complexity pipelined least-meansquare filter. The concept is based on a convex combination of two adaptive filters (ADFs) where the convergence performance of the combined filter is adjusted by the step-sizes of ADFs. The proposed technique replaced two ADF units by a single unit of the DA-based ADF. Further reduction in hardware complexity is achieved by sharing the filter partial products. Moreover, a bitlevel coefficient update unit is employed to minimise its hardware complexity. In addition, a novel low-cost strategy is presented to improve the convergence performance of the proposed filter by comparing the time-window corresponding to the maximum correlation of delayed error signals e(n - m) with a pre-defined window with n being time instant and m ∈ [1, 2]. Compared with the best existing scheme, the proposed design offers 46.42% fewer adders, 36.69% fewer registers and 18.75% fewer multiplexers for a 64th-order filter. Application specific integrated circuit synthesis results show that the proposed design occupies 37.10% less chip-area and consumes 24.79% less power. In addition, the proposed design provides 20.35% less area-delay-product and 4.76% less energy-per-sample for 64th order with the fourth-order base unit over the best existing scheme.

Original languageEnglish
Pages (from-to)792-801
Number of pages10
JournalIET Circuits, Devices and Systems
Volume12
Issue number6
DOIs
Publication statusPublished - 15 May 2018

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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