Impact of multiple sub-melt laser scans on the activation and diffusion of shallow Boron junctions

E. Rosseel, W. Vandervorst, T. Clarysse, J. Goossens, A. Moussa, R. Lin, Dirch H. Petersen, P. F. Nielsen, Ole Hansen, Nick Bennett, Nick E. B. Cowern

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Sub-melt laser annealing is a promising technique to achieve the required sheet resistance and junction depth specifications for the 32 nm technology node and beyond. In order to obtain a production worthy process with minimal sheet resistance variation at a macroscopic and microscopic level, careful process optimization is required. While macroscopic variations can easily be addressed using the proper spatial power compensation it is more difficult to completely eliminate the micro scale non-uniformity which is intimately linked to the laser beam profile, the amount of overlaps and the scan pitch. In this work, we will present micro scale sheet resistance uniformity measurements for shallow 0.5 keV B junctions and zoom in on the underlying effect of multiple subsequent laser scans. A variety of characterization techniques are used to extract the relevant junction parameters and the role of different implantation and anneal parameters will be explored. It turns out that the observed sheet resistance decrease with increasing number of laser scans is caused on one hand by a temperature dependent increase of the activation level, and on the other hand, by a non-negligible temperature and concentration dependent diffusion component.

Original languageEnglish
Title of host publication2008 16th IEEE International Conference on Advanced Thermal Processing of Semiconductors
Pages135-140
Number of pages6
ISBN (Electronic)9781424419517
DOIs
Publication statusPublished - 2008
Event16th IEEE International Conference on Advanced Thermal Processing of Semiconductors - Las Vegas, NV, United States
Duration: 30 Sept 20083 Oct 2008

Conference

Conference16th IEEE International Conference on Advanced Thermal Processing of Semiconductors
Country/TerritoryUnited States
CityLas Vegas, NV
Period30/09/083/10/08

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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