High performance multiplierless serial pipelined VLSI architecture for real-valued FFT

INIS

• performance 100%
• architecture 100%
• fourier transformation 100%
• design 40%
• comparative evaluations 40%
• units 40%
• data 20%
• applications 20%
• mapping 20%
• feedback 20%
• power 20%
• integrated circuits 20%
• calculation methods 20%
• tables 20%

Computer Science

• Fast Fourier Transform 100%
• Very large-scale integration (VLSI) architecture 100%
• Combinational Logic 40%
• Partial Product 40%
• Field Programmable Gate Arrays 20%
• Application Specific Integrated Circuit 20%
• Data Mapping 20%
• pipelined architecture 20%
• Mapping Scheme 20%

Engineering

• Fast Fourier Transform 100%
• Lookup Table 20%
• Field Programmable Gate Arrays 20%
• Flip Flop Circuits 20%
• Application Specific Integrated Circuit 20%