Free-space digital optical processor based on InGaAs/CMOS hybrid optoelectronic chips

Andy C. Walker

Free-space digital optical processor based on InGaAs/CMOS hybrid optoelectronic chips

Andy C. Walker

School of Engineering & Physical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

An optoelectronic parallel data sorter was developed as a technology demonstrator as part of the Scottish Collaborative Initiative in Optoelectronic Sciences. The system is based on two arrays of smart pixels, produced by integration of InGaAs/GaAs multiple quantum well modulator/detectors with CMOS electronics connected by an optical system which implements a perfect shuffle of the 1,024 parallel data channels. The target clock frequency of 100 MHz gives a sorting capacity of up to 1024 16 bit words in less than 20 µs. This corresponds to an I/O data rate of 200 Gbit/s for each of the chips in the system.

Original language	English
Title of host publication	Proceedings of the 1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim
Pages	275-276
Number of pages	2
Publication status	Published - 1997
Event	1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim - Chiba, Japan Duration: 14 Jul 1997 → 18 Jul 1997

Conference

Conference	1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim
Country/Territory	Japan
City	Chiba
Period	14/07/97 → 18/07/97

Cite this

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title = "Free-space digital optical processor based on InGaAs/CMOS hybrid optoelectronic chips",

abstract = "An optoelectronic parallel data sorter was developed as a technology demonstrator as part of the Scottish Collaborative Initiative in Optoelectronic Sciences. The system is based on two arrays of smart pixels, produced by integration of InGaAs/GaAs multiple quantum well modulator/detectors with CMOS electronics connected by an optical system which implements a perfect shuffle of the 1,024 parallel data channels. The target clock frequency of 100 MHz gives a sorting capacity of up to 1024 16 bit words in less than 20 µs. This corresponds to an I/O data rate of 200 Gbit/s for each of the chips in the system.",

author = "Walker, {Andy C.}",

year = "1997",

language = "English",

pages = "275--276",

booktitle = "Proceedings of the 1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim",

note = "1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim ; Conference date: 14-07-1997 Through 18-07-1997",

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AU - Walker, Andy C.

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Y1 - 1997

N2 - An optoelectronic parallel data sorter was developed as a technology demonstrator as part of the Scottish Collaborative Initiative in Optoelectronic Sciences. The system is based on two arrays of smart pixels, produced by integration of InGaAs/GaAs multiple quantum well modulator/detectors with CMOS electronics connected by an optical system which implements a perfect shuffle of the 1,024 parallel data channels. The target clock frequency of 100 MHz gives a sorting capacity of up to 1024 16 bit words in less than 20 µs. This corresponds to an I/O data rate of 200 Gbit/s for each of the chips in the system.

AB - An optoelectronic parallel data sorter was developed as a technology demonstrator as part of the Scottish Collaborative Initiative in Optoelectronic Sciences. The system is based on two arrays of smart pixels, produced by integration of InGaAs/GaAs multiple quantum well modulator/detectors with CMOS electronics connected by an optical system which implements a perfect shuffle of the 1,024 parallel data channels. The target clock frequency of 100 MHz gives a sorting capacity of up to 1024 16 bit words in less than 20 µs. This corresponds to an I/O data rate of 200 Gbit/s for each of the chips in the system.

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M3 - Conference contribution

SP - 275

EP - 276

BT - Proceedings of the 1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim

T2 - 1997 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim

Y2 - 14 July 1997 through 18 July 1997

ER -

Free-space digital optical processor based on InGaAs/CMOS hybrid optoelectronic chips

Abstract

Conference

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