Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder

Yun Wu; John Mcallister

doi:10.1109/SiPS52927.2021.00023

Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder

Yun Wu, John Mcallister

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

56 Downloads (Pure)

Abstract

Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.

Original language	English
Title of host publication	2021 IEEE Workshop on Signal Processing Systems (SiPS)
Publisher	IEEE
Pages	82-87
Number of pages	6
ISBN (Electronic)	9781665401449
DOIs	https://doi.org/10.1109/SiPS52927.2021.00023
Publication status	Published - 13 Nov 2021
Event	2021 International Workshop on Signal Processing Systems - Coimbra, Portugal Duration: 19 Oct 2021 → 21 Oct 2021 https://sips2021.org/

Publication series

Name	IEEE Workshop on Signal Processing Systems
ISSN (Electronic)	2374-7390

Workshop

Workshop	2021 International Workshop on Signal Processing Systems
Abbreviated title	SiPS 2021
Country/Territory	Portugal
City	Coimbra
Period	19/10/21 → 21/10/21
Internet address	https://sips2021.org/

Keywords

Adaptive Modulation
Field Programmable Gate Array
Fixed-complexity Sphere Decoder
Multiple-Input Multiple-Output

ASJC Scopus subject areas

Electrical and Electronic Engineering
Signal Processing
Applied Mathematics
Hardware and Architecture

Access to Document

10.1109/SiPS52927.2021.00023

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Cite this

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title = "Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder",

abstract = "Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.",

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N2 - Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.

AB - Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.

KW - Adaptive Modulation

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Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder

Abstract

Publication series

Workshop

Keywords

ASJC Scopus subject areas

Access to Document

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