Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere Decoder

Yun Wu, John Mcallister

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Abstract

Fixed-Complexity Sphere Decoder (FSD) is an quasi-optimal detector for Multiple-Input Multiple-Output (MIMO) system which is a hardware-friendly parallel tree-search customised to the modulation and antenna scheme employed. However, it is not able to adapt its behaviour for various modulation and antenna schemes, as demanded by modern wireless standard. This restricts its usage in modern adaptive MIMO systems. This paper proposes a solution to this problem. A configurable FSD structure in proposed where normalized higher order modulation schemes can accommodate lower ones. By exploiting clock-gating, FSD of all modulation schemes is equally trimmed to allow power savings of over 30% when implementing on Field Programmable Gate Array (FPGA). This architecture enables the facility to balance the power consumptions with compatible information rate in dynamic, adaptive MIMO communications environments.
Original languageEnglish
Title of host publication2021 IEEE Workshop on Signal Processing Systems (SiPS)
PublisherIEEE
Pages82-87
Number of pages6
ISBN (Electronic)9781665401449
DOIs
Publication statusPublished - 13 Nov 2021
Event2021 International Workshop on Signal Processing Systems - Coimbra, Portugal
Duration: 19 Oct 202121 Oct 2021
https://sips2021.org/

Publication series

NameIEEE Workshop on Signal Processing Systems
ISSN (Electronic)2374-7390

Workshop

Workshop2021 International Workshop on Signal Processing Systems
Abbreviated titleSiPS 2021
Country/TerritoryPortugal
CityCoimbra
Period19/10/2121/10/21
Internet address

Keywords

  • Adaptive Modulation
  • Field Programmable Gate Array
  • Fixed-complexity Sphere Decoder
  • Multiple-Input Multiple-Output

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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