Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder

P. Malini; G. Naveen Balaji; K. Boopathiraja; A. Gautami; P. Shanmugavadivu; S. Chenthur Pandian

doi:10.1109/ICACCS.2019.8728480

Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder

P. Malini, G. Naveen Balaji, K. Boopathiraja, A. Gautami, P. Shanmugavadivu, S. Chenthur Pandian

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit. The advanced new hybrid FA modules are more efficient in terms of the energy and postponement, these are because of the low yield capability and low power consumption. These proposed circuits are planned dependent on the full-swing EXOR-EXNOR or EXOR/EXNOR gates. Every one of the new designs has their very own preferences regarding speed, energy consumption, delay product, capacity of driving, and soon. To examine the execution of the new structures, broad Tanner simulation tools are utilized. By utilizing the transistor measuring (W/L) technique, the optimization of the PDP gained for every hybrid adder circuit.

Original language	English
Title of host publication	2019 5th International Conference on Advanced Computing and Communication Systems, ICACCS 2019
Publisher	IEEE
ISBN (Electronic)	9781538695333, 9781538695302
ISBN (Print)	9781538695319, 9781538695340
DOIs	https://doi.org/10.1109/ICACCS.2019.8728480
Publication status	Published - 6 Jun 2019
Event	5th International Conference on Advanced Computing and Communication Systems 2019 - Coimbatore, India Duration: 15 Mar 2019 → 16 Mar 2019

Conference

Conference	5th International Conference on Advanced Computing and Communication Systems 2019
Abbreviated title	ICACCS 2019
Country/Territory	India
City	Coimbatore
Period	15/03/19 → 16/03/19

Keywords

Delay estimation of power
E-xnor
E-xor
FA
Full swing
Non full swing

ASJC Scopus subject areas

Computer Vision and Pattern Recognition
Hardware and Architecture
Signal Processing
Computer Networks and Communications
Computer Science Applications

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ICACCS.2019.8728480

Cite this

@inproceedings{bb325462bf11483492796e00db09921e,

title = "Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder",

abstract = "This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit. The advanced new hybrid FA modules are more efficient in terms of the energy and postponement, these are because of the low yield capability and low power consumption. These proposed circuits are planned dependent on the full-swing EXOR-EXNOR or EXOR/EXNOR gates. Every one of the new designs has their very own preferences regarding speed, energy consumption, delay product, capacity of driving, and soon. To examine the execution of the new structures, broad Tanner simulation tools are utilized. By utilizing the transistor measuring (W/L) technique, the optimization of the PDP gained for every hybrid adder circuit.",

keywords = "Delay estimation of power, E-xnor, E-xor, FA, Full swing, Non full swing",

author = "P. Malini and Balaji, \{G. Naveen\} and K. Boopathiraja and A. Gautami and P. Shanmugavadivu and Pandian, \{S. Chenthur\}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 5th International Conference on Advanced Computing and Communication Systems 2019, ICACCS 2019 ; Conference date: 15-03-2019 Through 16-03-2019",

year = "2019",

month = jun,

day = "6",

doi = "10.1109/ICACCS.2019.8728480",

language = "English",

isbn = "9781538695319",

booktitle = "2019 5th International Conference on Advanced Computing and Communication Systems, ICACCS 2019",

publisher = "IEEE",

address = "United States",

}

Malini, P, Balaji, GN, Boopathiraja, K, Gautami, A, Shanmugavadivu, P & Pandian, SC 2019, Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder. in 2019 5th International Conference on Advanced Computing and Communication Systems, ICACCS 2019., 8728480, IEEE, 5th International Conference on Advanced Computing and Communication Systems 2019, Coimbatore, India, 15/03/19. https://doi.org/10.1109/ICACCS.2019.8728480

TY - GEN

T1 - Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder

AU - Malini, P.

AU - Balaji, G. Naveen

AU - Boopathiraja, K.

AU - Gautami, A.

AU - Shanmugavadivu, P.

AU - Pandian, S. Chenthur

PY - 2019/6/6

Y1 - 2019/6/6

N2 - This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit. The advanced new hybrid FA modules are more efficient in terms of the energy and postponement, these are because of the low yield capability and low power consumption. These proposed circuits are planned dependent on the full-swing EXOR-EXNOR or EXOR/EXNOR gates. Every one of the new designs has their very own preferences regarding speed, energy consumption, delay product, capacity of driving, and soon. To examine the execution of the new structures, broad Tanner simulation tools are utilized. By utilizing the transistor measuring (W/L) technique, the optimization of the PDP gained for every hybrid adder circuit.

AB - This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit. The advanced new hybrid FA modules are more efficient in terms of the energy and postponement, these are because of the low yield capability and low power consumption. These proposed circuits are planned dependent on the full-swing EXOR-EXNOR or EXOR/EXNOR gates. Every one of the new designs has their very own preferences regarding speed, energy consumption, delay product, capacity of driving, and soon. To examine the execution of the new structures, broad Tanner simulation tools are utilized. By utilizing the transistor measuring (W/L) technique, the optimization of the PDP gained for every hybrid adder circuit.

KW - Delay estimation of power

KW - E-xnor

KW - E-xor

KW - FA

KW - Full swing

KW - Non full swing

UR - https://www.scopus.com/pages/publications/85068005554

U2 - 10.1109/ICACCS.2019.8728480

DO - 10.1109/ICACCS.2019.8728480

M3 - Conference contribution

AN - SCOPUS:85068005554

SN - 9781538695319

SN - 9781538695340

BT - 2019 5th International Conference on Advanced Computing and Communication Systems, ICACCS 2019

PB - IEEE

T2 - 5th International Conference on Advanced Computing and Communication Systems 2019

Y2 - 15 March 2019 through 16 March 2019

ER -

Design of Swing Dependent XOR-XNOR Gates based Hybrid Full Adder

Abstract

Conference

Keywords

ASJC Scopus subject areas

UN SDGs

Access to Document

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