Data layout inference for code vectorisation

Artjoms Sinkarovs; Sven Bodo Scholz

doi:10.1109/HPCSim.2013.6641464

Data layout inference for code vectorisation

Artjoms Sinkarovs, Sven Bodo Scholz

School of Mathematical & Computer Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

SIMD instructions of modern CPUs are crucially important for the performance of compute-intensive algorithms. Auto-vectorisation often fails due to an unfortunate choice of data layout by the programmer. This paper proposes a data layout inference for auto-vectorisation which identifies layout transformations that convert SIMD-unfavorable layouts of data structures into favorable ones. We present a type system for layout transformations and we sketch an inference algorithm for it. Finally, we present some initial performance figures for the impact of the inferred layout transformations. They show that non-intuitive layouts that are inferred through our system can have a vast performance impact on compute intensive programs.

Original language	English
Title of host publication	Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013
Pages	527-534
Number of pages	8
DOIs	https://doi.org/10.1109/HPCSim.2013.6641464
Publication status	Published - 26 Nov 2013
Event	2013 11th International Conference on High Performance Computing and Simulation - Helsinki, United Kingdom Duration: 1 Jul 2013 → 5 Jul 2013

Conference

Conference	2013 11th International Conference on High Performance Computing and Simulation
Abbreviated title	HPCS 2013
Country/Territory	United Kingdom
City	Helsinki
Period	1/07/13 → 5/07/13

ASJC Scopus subject areas

Applied Mathematics
Modelling and Simulation

Access to Document

10.1109/HPCSim.2013.6641464

Cite this

@inproceedings{fa1efadb613847c3aa32b699625754d9,

title = "Data layout inference for code vectorisation",

abstract = "SIMD instructions of modern CPUs are crucially important for the performance of compute-intensive algorithms. Auto-vectorisation often fails due to an unfortunate choice of data layout by the programmer. This paper proposes a data layout inference for auto-vectorisation which identifies layout transformations that convert SIMD-unfavorable layouts of data structures into favorable ones. We present a type system for layout transformations and we sketch an inference algorithm for it. Finally, we present some initial performance figures for the impact of the inferred layout transformations. They show that non-intuitive layouts that are inferred through our system can have a vast performance impact on compute intensive programs.",

author = "Artjoms Sinkarovs and Scholz, {Sven Bodo}",

year = "2013",

month = nov,

day = "26",

doi = "10.1109/HPCSim.2013.6641464",

language = "English",

isbn = "9781479908363",

pages = "527--534",

booktitle = "Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013",

note = "2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013 ; Conference date: 01-07-2013 Through 05-07-2013",

}

TY - GEN

T1 - Data layout inference for code vectorisation

AU - Sinkarovs, Artjoms

AU - Scholz, Sven Bodo

PY - 2013/11/26

Y1 - 2013/11/26

N2 - SIMD instructions of modern CPUs are crucially important for the performance of compute-intensive algorithms. Auto-vectorisation often fails due to an unfortunate choice of data layout by the programmer. This paper proposes a data layout inference for auto-vectorisation which identifies layout transformations that convert SIMD-unfavorable layouts of data structures into favorable ones. We present a type system for layout transformations and we sketch an inference algorithm for it. Finally, we present some initial performance figures for the impact of the inferred layout transformations. They show that non-intuitive layouts that are inferred through our system can have a vast performance impact on compute intensive programs.

AB - SIMD instructions of modern CPUs are crucially important for the performance of compute-intensive algorithms. Auto-vectorisation often fails due to an unfortunate choice of data layout by the programmer. This paper proposes a data layout inference for auto-vectorisation which identifies layout transformations that convert SIMD-unfavorable layouts of data structures into favorable ones. We present a type system for layout transformations and we sketch an inference algorithm for it. Finally, we present some initial performance figures for the impact of the inferred layout transformations. They show that non-intuitive layouts that are inferred through our system can have a vast performance impact on compute intensive programs.

U2 - 10.1109/HPCSim.2013.6641464

DO - 10.1109/HPCSim.2013.6641464

M3 - Conference contribution

AN - SCOPUS:84888034493

SN - 9781479908363

SP - 527

EP - 534

BT - Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013

T2 - 2013 11th International Conference on High Performance Computing and Simulation

Y2 - 1 July 2013 through 5 July 2013

ER -

Data layout inference for code vectorisation

Abstract

Conference

ASJC Scopus subject areas

Access to Document

Fingerprint

Cite this