Abstract
In this work, we derive three novel composite field arithmetic (CFA) Advanced Encryption Standard (AES) S-boxes of the field GF(((2 2) 2) 2). The best construction is selected after a sequence of algorithmic and architectural optimization processes. Furthermore, for each composite field constructions, there exists eight possible isomorphic mappings. Therefore, after the exploitation of a new common subexpression elimination algorithm, the isomorphic mapping that results in the minimal implementation area cost is chosen. High throughput hardware implementations of our proposed CFA AES S-boxes are reported towards the end of this paper. Through the exploitation of both algebraic normal form and seven stages fine-grained pipelining, our best case achieves a throughput 3.49 Gbps on a Cyclone II EP2C5T144C6 field-programmable gate array.
Original language | English |
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Article number | 5764853 |
Pages (from-to) | 1151-1155 |
Number of pages | 5 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 20 |
Issue number | 6 |
DOIs | |
Publication status | Published - Jun 2012 |
Keywords
- Advanced Encryption Standard (AES)
- Algebraic normal form (ANF)
- Composite field arithmetic (CFA)
- S-box
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering