Construction of optimum composite field architecture for compact high-throughput AES S-boxes

M. M. Wong*, M. L. Dennis Wong, A. K. Nandi, I. Hijazin

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

50 Citations (Scopus)


In this work, we derive three novel composite field arithmetic (CFA) Advanced Encryption Standard (AES) S-boxes of the field GF(((2 2) 2) 2). The best construction is selected after a sequence of algorithmic and architectural optimization processes. Furthermore, for each composite field constructions, there exists eight possible isomorphic mappings. Therefore, after the exploitation of a new common subexpression elimination algorithm, the isomorphic mapping that results in the minimal implementation area cost is chosen. High throughput hardware implementations of our proposed CFA AES S-boxes are reported towards the end of this paper. Through the exploitation of both algebraic normal form and seven stages fine-grained pipelining, our best case achieves a throughput 3.49 Gbps on a Cyclone II EP2C5T144C6 field-programmable gate array.

Original languageEnglish
Article number5764853
Pages (from-to)1151-1155
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number6
Publication statusPublished - Jun 2012


  • Advanced Encryption Standard (AES)
  • Algebraic normal form (ANF)
  • Composite field arithmetic (CFA)
  • S-box

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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