Combinational Logic Optimization for Ultra-Constrained Applications

Jia Jun Tay, M. L. Dennis Wong, Ming Ming Wong, Cishen Zhang, Ismat Hijazin

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Modern computing paradigm such as the Internet of Things demands edge devices with limited resources to be capable of complex computing functions. In this work, we discuss a relatively new approach to combinational circuit optimization based on a low multiplicative complexity heuristic. The purpose of the optimization heuristic is to produce low gate count circuit to enable complex transformation to fit in devices that operate in ultra-constrained environments. We explain the concepts behind the heuristic and review the original optimization algorithm based on the heuristic. A new approach is then proposed to eliminate reliance on randomness in the original algorithm to improve computational time and quality of results.

Original languageEnglish
Title of host publication2018 6th Edition of International Conference on Wireless Networks and Embedded Systems (WECON)
Number of pages4
ISBN (Electronic)9781538670507
Publication statusPublished - 1 Aug 2019
Event6th International Conference on Wireless Networks and Embedded Systems 2018 - Rajpura, Punjab, India
Duration: 16 Nov 201817 Nov 2018


Conference6th International Conference on Wireless Networks and Embedded Systems 2018
Abbreviated titleWECON 2018
CityRajpura, Punjab


  • Combinational logic
  • low gate count
  • multiplicative complexity

ASJC Scopus subject areas

  • Instrumentation
  • Computer Networks and Communications
  • Signal Processing
  • Electrical and Electronic Engineering


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