Bit swapping linear feedback shift register for low power application using 130nm complementary metal oxide semiconductor technology

N. Binti Mohd Hanib, F. Choong, Bin Ibne M. Reaz, N. Kamala, T. Badal

Research output: Contribution to journalArticle

Abstract

Bit swapping linear feedback shift register (BS-LFSR) is employed in a conventional linear feedback shirt register (LFSR) to reduce its power dissipation and enhance its performance. In this paper, an enhanced BS-LFSR for low power application is proposed. To achieve low power dissipation, the proposed BS-LFSR introduced the stacking technique to reduce leakage current. In addition, three different architectures to enhance the feedback element used in BS-LFSR was explored. The pass transistor merged with transistor stack method yielded a better reduction in power dissipation compared to pass transistor design and NAND gate design. The BS-LFSR was designed in Mentor Graphic - TSMC Design Kit Environment using 130nm complementary metal oxide semiconductor (CMOS) technology. The proposed 4-bit BS-LFSR achieved an active area of 1241.1588um2 and consumed only 53.8844nW with total power savings of 19.43%. The proposed design showed superiority when compared with the conventional LFSR and related work in reducing power dissipation and area.

Original languageEnglish
Pages (from-to)1126-1133
Number of pages8
JournalInternational Journal of Engineering: Transactions B: Applications
Volume30
Issue number8
Early online date1 Aug 2017
DOIs
Publication statusPublished - Aug 2017

Keywords

  • Bit Swapping Linear Feedback Shift Register
  • Low Power
  • Stacking Technique

ASJC Scopus subject areas

  • Engineering(all)

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