TY - GEN
T1 - Area-energy aware dataflow optimisation of visual tracking systems
AU - Garcia, Paulo
AU - Bhowmik, Deepayan
AU - Wallace, Andrew
AU - Stewart, Robert
AU - Michaelson, Greg
PY - 2018/4/8
Y1 - 2018/4/8
N2 - This paper presents an orderly dataflow-optimisation approach suitable for area-energy aware computer vision applications on FPGAs. Vision systems are increasingly being deployed in power constrained scenarios, where the dataflow model of computation has become popular for describing complex algorithms. Dataflow model allows processing datapaths comprised of several independent and well defined computations. However, compilers are often unsuccessful in identifying domain-specific optimisation opportunities resulting in wasted resources and power consumption. We present a methodology for the optimisation of dataflow networks, according to patterns often found in computer vision systems, focusing on identifying optimisations which are not discovered automatically by an optimising compiler. Code transformation using profiling and refactoring provides opportunities to optimise the design, targeting FPGA implementations and focusing on area and power abatement. Our refactoring methodology, applying transformations to a complex algorithm for visual tracking resulted in significant reduction in power consumption and resource usage.
AB - This paper presents an orderly dataflow-optimisation approach suitable for area-energy aware computer vision applications on FPGAs. Vision systems are increasingly being deployed in power constrained scenarios, where the dataflow model of computation has become popular for describing complex algorithms. Dataflow model allows processing datapaths comprised of several independent and well defined computations. However, compilers are often unsuccessful in identifying domain-specific optimisation opportunities resulting in wasted resources and power consumption. We present a methodology for the optimisation of dataflow networks, according to patterns often found in computer vision systems, focusing on identifying optimisations which are not discovered automatically by an optimising compiler. Code transformation using profiling and refactoring provides opportunities to optimise the design, targeting FPGA implementations and focusing on area and power abatement. Our refactoring methodology, applying transformations to a complex algorithm for visual tracking resulted in significant reduction in power consumption and resource usage.
UR - http://www.scopus.com/inward/record.url?scp=85046254168&partnerID=8YFLogxK
U2 - 10.1007/978-3-319-78890-6_42
DO - 10.1007/978-3-319-78890-6_42
M3 - Conference contribution
AN - SCOPUS:85046254168
SN - 9783319788890
T3 - Lecture Notes in Computer Science
SP - 523
EP - 536
BT - Applied Reconfigurable Computing
PB - Springer
T2 - 14th International Symposium on Applied Reconfigurable Computing 2018
Y2 - 2 May 2018 through 4 May 2018
ER -