Approximate Parallel l1-Solver on FPGA: a 3D Image Reconstruction Case Study

Andreas Aßmann, Yun Wu, Brian Stewart, Andrew Michael Wallace

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We demonstrate an efficient and accelerated implementation
of a parallel sparse depth reconstruction framework
using compressed sensing (CS) techniques. Recent work suggests
that CS can be split up into smaller sub problems. This allows
us to efficiently pre-compute important components of the
LU decomposition and subsequent linear algebra to solve a
set of linear equations found in algorithms such as the alternating
direction method of multipliers (ADMM). For comparison, a
fully discrete least square reconstruction method is also
presented.
We also investigate how reduced precision is leveraged to
reduce the number of logic units in field-programmable gate
array (FPGA) implementations for such sparse imaging systems.
We show that the amount of logic units, memory requirements
and power consumption is reduced significantly by over 80%
with minimal impact on the quality of reconstruction. This
demonstrates the feasibility of novel high resolution, low power
and high frame rate light detection and ranging (LiDAR) depth
imagers based on sparse illumination.
Original languageEnglish
Title of host publicationProceedings of the 28th European Signal Processing Conference
Publication statusAccepted/In press - 21 Sep 2020
Event28th European Signal Processing Conference - Amsterdam, Netherlands
Duration: 18 Jan 202122 Jan 2021
https://eusipco2020.org/

Conference

Conference28th European Signal Processing Conference
Abbreviated titleEUSIPCO 2020
CountryNetherlands
CityAmsterdam
Period18/01/2122/01/21
Internet address

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  • Cite this

    Aßmann, A., Wu, Y., Stewart, B., & Wallace, A. M. (Accepted/In press). Approximate Parallel l1-Solver on FPGA: a 3D Image Reconstruction Case Study. In Proceedings of the 28th European Signal Processing Conference