### Abstract

The problem of distinguishing and classifying the responses of analog integrated circuits containing catastrophic faults has aroused recent interest. The problem is made more difficult when parametric variations are taken into account. Hence, statistical methods and techniques such as neural networks have been employed to automate classification. The major drawback to such techniques has been the implicit assumption that the variances of the responses of faulty circuits have been the same as each other and the same as that of the fault-free circuit. This assumption can be shown to be false. Neural networks, moreover, have proved to be slow. This paper describes a new neural network structure that clusters responses assuming different means and variances. Sophisticated statistical techniques are employed to handle situations where the variance tends to zero, such as happens with a fault that causes a response to be stuck at a supply rail. Two example circuits are used to show that this technique is significantly more accurate than other classification methods. A set of responses can be classified in the order of 1 s.

Original language | English |
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Pages (from-to) | 142-151 |

Number of pages | 10 |

Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |

Volume | 19 |

Issue number | 1 |

DOIs | |

Publication status | Published - 2000 |

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*IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems*,

*19*(1), 142-151. https://doi.org/10.1109/43.822626

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*IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems*, vol. 19, no. 1, pp. 142-151. https://doi.org/10.1109/43.822626

**Applying a robust heteroscedastic probabilistic neural network to analog fault detection and classification.** / Yang, Zheng Rong; Zwolinski, Mark; Chalk, Chris D.; Williams, Alan Christopher.

Research output: Contribution to journal › Article

TY - JOUR

T1 - Applying a robust heteroscedastic probabilistic neural network to analog fault detection and classification

AU - Yang, Zheng Rong

AU - Zwolinski, Mark

AU - Chalk, Chris D.

AU - Williams, Alan Christopher

PY - 2000

Y1 - 2000

N2 - The problem of distinguishing and classifying the responses of analog integrated circuits containing catastrophic faults has aroused recent interest. The problem is made more difficult when parametric variations are taken into account. Hence, statistical methods and techniques such as neural networks have been employed to automate classification. The major drawback to such techniques has been the implicit assumption that the variances of the responses of faulty circuits have been the same as each other and the same as that of the fault-free circuit. This assumption can be shown to be false. Neural networks, moreover, have proved to be slow. This paper describes a new neural network structure that clusters responses assuming different means and variances. Sophisticated statistical techniques are employed to handle situations where the variance tends to zero, such as happens with a fault that causes a response to be stuck at a supply rail. Two example circuits are used to show that this technique is significantly more accurate than other classification methods. A set of responses can be classified in the order of 1 s.

AB - The problem of distinguishing and classifying the responses of analog integrated circuits containing catastrophic faults has aroused recent interest. The problem is made more difficult when parametric variations are taken into account. Hence, statistical methods and techniques such as neural networks have been employed to automate classification. The major drawback to such techniques has been the implicit assumption that the variances of the responses of faulty circuits have been the same as each other and the same as that of the fault-free circuit. This assumption can be shown to be false. Neural networks, moreover, have proved to be slow. This paper describes a new neural network structure that clusters responses assuming different means and variances. Sophisticated statistical techniques are employed to handle situations where the variance tends to zero, such as happens with a fault that causes a response to be stuck at a supply rail. Two example circuits are used to show that this technique is significantly more accurate than other classification methods. A set of responses can be classified in the order of 1 s.

UR - http://www.scopus.com/inward/record.url?scp=0033908161&partnerID=8YFLogxK

U2 - 10.1109/43.822626

DO - 10.1109/43.822626

M3 - Article

VL - 19

SP - 142

EP - 151

JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

SN - 0278-0070

IS - 1

ER -