A digital predistortion system with extended correction bandwidth with application to LTE-A nonlinear power amplifiers

O. Hammi, A. Kwan, S. Bensmida, K. A. Morris, F. M. Ghannouchi

Research output: Contribution to journalArticle

38 Citations (Scopus)

Abstract

This article presents a bandwidth extended digital predistortion system suitable for LTE-advanced applications. The proposed predistortion system uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function. The proposed predistorter was experimentally validated and its performance benchmarked against a predistorter having the same structure but identified using the conventional approach. The measurement results demonstrate that the proposed predistorter requires 30% less sampling speed for the analog to digital converter of the feedback path.
Original languageEnglish
Pages (from-to)3487-3495
Number of pages9
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume61
Issue number12
DOIs
Publication statusPublished - Dec 2014

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