130-GHz on-chip meander slot antennas with stacked dielectric resonators in standard CMOS echnology

This work discusses the design methodologies of 130-GHz high gain and high efficiency on-chip meander slot antennas in a standard CMOS technology. In the proposed structure, stacked dielectric resonators (DRs) are placed on the top of the on-chip feeding element to form series-fed antenna array for antenna gain and efficiency improvement. The integrated antenna with double stacked DRs achieved a measured gain of 4.7 dBi at 130 GHz with a bandwidth of 11%. The antenna size is 0.8 x 0.9 mm(2) and the simulation results indicate a radiation efficiency of 43%. To the best of our knowledge, this is the first demonstration of an on-chip antenna gain and efficiency enhancement through stacked DRs.