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Open access dataset for "Verifying Parallel Dataflow Transformations with Model Checking and its Application to FPGAs"
Robert James Stewart
(Creator)
School of Mathematical & Computer Sciences
Computer Science
Dataset
Overview
Research output
(1)
Research output
Research output per year
2019
2019
2019
1
Article
Research output per year
Research output per year
1 results
Publication Year, Title
(descending)
Publication Year, Title
(ascending)
Title
Type
Search results
2019
Verifying Parallel Dataflow Transformations with Model Checking and its Application to FPGAs
Stewart, R.
,
Berthomieu, B.
,
Garcia, P.
,
Ibrahim, I.
,
Michaelson, G.
&
Wallace, A.
,
Dec 2019
,
In:
Journal of Systems Architecture.
101
, 101657.
Research output
:
Contribution to journal
›
Article
›
peer-review
Open Access
File
Temporal logic
100%
Model checking
90%
Field programmable gate arrays (FPGA)
69%
Computer programming
30%
Real time systems
28%
2
Citations (SciVal)
31
Downloads (Pure)